Reduced Order Generator Implementation
How the reduced order machine equations are arranged in code and stamped into the solver.
One page per model family, covering the class hierarchy, how the component interfaces with the solver, its attributes and state layout, and the traps in configuring it. The equations behind each are under Concepts, which names no class; these pages name nothing else.
Which domains implement which model is in model availability, generated from the headers.
How the reduced order machine equations are arranged in code and stamped into the solver.
How the switch and load models are arranged in code, and the traps in configuring them.
How the source components stamp, and the quirks in the non-ideal ones.
How the external network, the static compensator and the solid state transformer are built.
The SSN base class hierarchy and what a new SSN component has to provide.
How control and signal blocks are written, stepped and scheduled.
How the dynamic phasor averaged inverter is arranged in code and interfaced to the solver.
How the three-phase dynamic phasor averaged inverter is arranged in code.
How the EMT averaged inverter is arranged in code and interfaced to the solver.
How the grid-forming inverter is linearized, stamped and configured.